The disclosures herein relate generally to computer systems supporting the Intelligent Input/Output Architecture Specification, and more particularly, to a booting mechanism enabling the computer systems to boot from an Intelligent Input/Output (I2O) device having no Option ROM attached thereto.
The Intelligent Input/Output Architecture is an open architecture for the development of device drivers that are independent of any specific operation system (OS), processor platform, and I/O system bus. With reference to FIG. 1, conforming to the I2O Architecture, an I2O subsystem 10 having a split driver model is split into an Operating System Specific Module (OSM) 11 and a Hardware Device Module (HDM) 12. While the OSM only runs on a host processor 14, the HDM is an Input/Output (I/O) hardware specific module which is unaware of the specific operating system of the host processor. The HDM provides an interface to the I/O adapter and I2O devices 15 thereunder through an I/O platform subsystem (IOP) 16. Both OSM and HDM modules communicate with each other via a message passing layer 18, such as depicted in FIG. 1. Thus, an I2O subsystem contains at least one I2O hardware device (I2O device) and at least one IOP, which itself includes a processor, memory and I2O device drivers that are managed independently for the sole purpose of processing I/O transactions. With this relative independence, an I2O subsystem has various advantages such as reducing the expense for I2O adapter card vendors to develop and maintain products that support multiple operating systems, simplifying testings of a given I2O device because of the split driver model isolates functionality, and improving system performance because I/O-intensive functions of the OS are advantageously handled by an independent I2O subsystem.
In order to boot from an I2O device in a computer system, the BIOS of the computer system must be prepared at least to recognize bootable I2O devices. The BIOS must be modified to send, receive, and properly handle I2O messages as required to initialize and utilize an I2O device by sending a subset of the complete set of I2O messages to an IOP. An IOP can be plugged in any system Peripheral Component Interconnect (PCI) bus, and upon system reset, both the BIOS and the I2O subsystem begin initialization. When the BIOS performs its initialization tasks, it scans the entire PCI bus. An IOP would hold off this scan by retrying the PCI bus configuration access to guarantee that the IOP is fully initialized to the first known state (Init State) while preventing the BIOS from seeing invalid information. Only after the IOP is initialized to the Init State can the BIOS continue the normal PCI bus scan knowing that the communication between the IOP and the BIOS is fully completed. However, an I2O device without an Option ROM does not permit the IOP to complete an initialization as expected. In such an instance, the BIOS would not establish the communication with the IOP, and consequently would not recognize the I2O device as an active device. As a result, the OS can not be booted from the I2O device. Even if an bootable OS disk drive is attached to such an I2O device, if the I2O device has no Option ROM, the OS still can not be booted because there has been no initialization of the IOP to establish the communication with the BIOS, and thus the BIOS would still view the I2O device as an unbootable device.
There are two common methods of booting an OS of a computer system. One is called a sequential boot wherein the BIOS scans from one of the two ends of the PCI bus and boots the OS from the first bootable device. The other is called a selective boot in Setup mode wherein a user can select any bootable device on the PCI bus as the system boot device for booting the OS. In a selective boot, if an I2O device has no Option ROM attached, it can not be used as a bootable device at all. In a sequential boot, unless an I2O device is at either end of the PCI bus and the I2O device has an Option ROM, the only way to boot the OS from an I2O device, is to xe2x80x9chard codexe2x80x9d the BIOS with detailed instructions to use the I2O device as a boot device regardless of its location on the PCI bus. Only with this arrangement in the BIOS boot sequence, the BIOS can initialize the IOP for the I2O device.
Turning now to FIG. 2, a process flow of booting the OS from an I2O device, having no Option ROM attached thereto, by hard coding the BIOS shall now be discussed. Once a computer system is powered up in step 20, the BIOS scans and configures the PCI bus in step 22. The scanning starts from the first PCI bus slot, and the BIOS determines whether the device is an I2O device, as shown in step 24. If it happens to be an I2O device, then the I2O subsystem will be initialized in step 26. In a next step 28, the BIOS further determines whether the I2O device is bootable device. If it is a bootable device, then I2O INT 13h handler is hooked immediately in step 30. Either after the device is detected as a non-I2O device in step 24, or is an unbootable I2O device but treated as a non-I2O device in step 28, the BIOS will search for more PCI devices in step 32. After the last PCI bus slot is scanned, a PCI Option ROM will be initialized in step 34. Then, in step 36, without regard to the detected device sequence during the scan, the OS is always to be booted from a bootable I2O device found in the scan. In other words, even if there is a bootable non-I2O device detected before an I2O device during the scan, the BIOS still has to boot from the I2O device. Obviously, the rigidity of this arrangement does not conform to the Sequential Boot Specification known in the art. Moreover, this arrangement furthermore reduces flexibility of the boot sequence that computer system manufacturers usually expect. For example, a computer system with such an arrangement in the BIOS can not boot the OS from a non-I2O device during a sequential boot even if the non-I2O device is located at one end of the PCI bus.
It is thus desirable to provide a computer system that is capable of booting the OS from an I2O device having no Option ROM to boot from a regular bootable non-I2O device, such as a PCI SCSI device, without restricting the arrangement of the system BIOS boot sequence. In addition, it is also desirable to use such an I2O device as a boot device in a selective boot process.
In order to support I2O Architecture and conform to the existing Sequential Boot Specification known in the art, what is provided is a computer system supporting an Intelligent I/O architecture having at least one bootable non-Intelligent I/O data storage and including at least one Intelligent I/O subsystem and at least one Intelligent I/O device having no Option ROM associated therewith and residing within the Intelligent I/O subsystem. A data storage detector is provided for identifying the Intelligent I/O device. An Intelligent I/O subsystem initializer configures the Intelligent I/O subsystem. A Virtual Option ROM is stored in a computer system BIOS boot sequence code for enabling the computer system to boot from at least one Intelligent I/O device subsequent to being identified by the data storage detector and the Intelligent I/O subsystem being fully configured by the Intelligent subsystem initializer.
For a computer system installed with I2O compliant operating system, the embodiments of the present disclosure advantageously skip the initialization process of an IOP if a non-I2O bootable device has been found before the detection of an I2O device during the Power On Self Test. In this case, it is rather convenient to let the OS be booted from a non-I2O bootable device such as a hard disk drive. Once the OS is functional, it can initialize the relevant IOP afterwards in order to utilize the I2O device thereunder.